/**
 * *****************************************************************
 * @file    adt3102_rx.h
 * @author  WuHao(hwu@andartechs.com.cn)
 * @version 1.0.0
 * @date    2020-11-09
 * @brief   
 *                 Copyright (c) 2020, Andar Technologies Inc.
 *                           www.andartechs.com 
 *
 * *****************************************************************
 */
#ifndef __RX_H
#define __RX_H
/*------------------------------ include -------------------------------------*/
#include "adt3102_type_define.h"


/*------------------------------- define -------------------------------------*/
/* TIA_GAIN_xDB :TIA diff gain setting, 0~18dB, 6dB/bit */
#define TIA_GAIN_0DB  0
#define TIA_GAIN_6DB  1
#define TIA_GAIN_12DB 2
#define TIA_GAIN_18DB 3

/* PGA_GAIN_xDB :PGA diff gain, 0~40dB,2dB/bit */
#define PGA_GAIN_0DB    0  
#define PGA_GAIN_2DB    1    
#define PGA_GAIN_4DB    2
#define PGA_GAIN_6DB    3
#define PGA_GAIN_8DB    4
#define PGA_GAIN_10DB   5
#define PGA_GAIN_12DB   6
#define PGA_GAIN_14DB   7
#define PGA_GAIN_16DB   8
#define PGA_GAIN_18DB   9
#define PGA_GAIN_20DB   10
#define PGA_GAIN_22DB   11
#define PGA_GAIN_24DB   12
#define PGA_GAIN_26DB   13
#define PGA_GAIN_28DB   14
#define PGA_GAIN_30DB   15
#define PGA_GAIN_32DB   16
#define PGA_GAIN_34DB   17
#define PGA_GAIN_36DB   18
#define PGA_GAIN_38DB   19
#define PGA_GAIN_40DB   20
#define PGA_GAIN_42DB   21
#define PGA_GAIN_44DB   22
#define PGA_GAIN_46DB   23
#define PGA_GAIN_48DB   24

/* PGA_CAL_Nx :I/Q calibration gain range: -1~1dB, 0.5dB/bit */
#define PGA_CAL_N1 0  //-1DB
#define PGA_CAL_N5 1  //-0.5DB
#define PGA_CAL_P1 2  //0.5DB
#define PGA_CAL_P5 3  //1DB

/* RC_HPF_xKHZ :rc hpf select */
#define RC_HPF_150KHZ  150
#define RC_HPF_400KHZ  400

/* TIA_HPF_xKHZ :tia hpf parameter select */
#define TIA_HPF_25KHZ   0
#define TIA_HPF_50KHZ   1
#define TIA_HPF_100KHZ  2
#define TIA_HPF_300KHZ  3

/* PGA_LPF_xM :pga lpf parameter select */
#define PGA_LPF_2M 0
#define PGA_LPF_4M 1
#define PGA_LPF_6M 2
#define PGA_LPF_8M 3

/* PGA_HPF_xKHZ :pga hpf parameter select */
#define PGA_HPF_25KHZ  0
#define PGA_HPF_50KHZ  1
#define PGA_HPF_100KHZ 2
#define PGA_HPF_500KHZ 3


/*------------------------------ function ------------------------------------*/
/*                        LNA                             */
/**
 * @brief   control rx lna enable.
 *          register*RW*rfc_rx_lna_reg
 *          [1] 1'h0    lna1_en:LNA1 enable 
 *          [0] 1'h0    lna0_en:LNA0 enable 
 * @param   lna0Enable: rx0 enable.
 * @param   lna1Enable: rx1 enable.
 * @return  None.
 * @note
 */
void rxLnaEnable(int32 lna0Enable, int32 lna1Enable);

/**
 * @brief   control mixer enable.
 * @param   ch0MixerEnable: channel0 Mixer enable.
 * @param   ch1MixerEnable: channel1 Mixer enable.
 * @return  None.
 * @note
 */
void mixerEnable(int32 ch0MixerEnable, int32 ch1MixerEnable);

/**
 * @brief   lna regular bias.
 * @param   lna0bias: channel0 bias enable.
 * @param   lna1bias: channel1 bias enable.
 * @return  None.
 * @note
 */
void lnaRegularBias(int32 lna0bias, int32 lna1bias);

/**
 * @brief   control dac lna bias.
 * @param   ch0bias1: channel0 DAC bias1.
 * @param   ch0bias2: channel0 DAC bias2.
 * @param   ch0bias3: channel0 DAC bias3.
 * @param   ch1bias1: channel1 DAC bias1.
 * @param   ch1bias2: channel1 DAC bias2.
 * @param   ch1bias3: channel1 DAC bias3.
 * @return  None.
 * @note
 */
void lnaDacBias(int32 ch0bias1, int32 ch0bias2, int32 ch0bias3, int32 ch1bias1, int32 ch1bias2, int32 ch1bias3);

/**
 * @brief   rf tia enable.
 * @param   tia0enable: enable TIA0.
 * @param   tia1enable: enable TIA1.
 * @return  None.
 * @note
 */
void rfTiaEnable(int32 tia0Enable, int32 tia1Enable);

/**
 * @brief   rf tia gain setting. selection:
 *          TIA_GAIN_6DB 
 *          TIA_GAIN_12DB
 *          TIA_GAIN_18DB
 *          register*RW*rfc_tia0_cfg_reg
 *          [11:10] 2'h2    tia0_q_gain:TIA diff gain setting,
 *                  0~18dB, 6dB/bit (AGC_VGA0[3:2])
 *          [9:8]   2'h2    tia0_i_gain:TIA diff gain setting,
 *                  0~18dB, 6dB/bit (AGC_VGA0[1:0])
 * @param   tia0IGain: TIA0I diff gain setting.
 * @param   tia0QGain: TIA0Q diff gain setting.
 * @param   tia1IGain: TIA1I diff gain setting.
 * @param   tia1QGain: TIA1Q diff gain setting.
 * @return  None.
 * @note
 */
void rfTiaGainSetting(int32 tia0IGain, int32 tia0QGain, int32 tia1IGain, int32 tia1IQain);

/**
 * @brief   rf tia bias setting.selection:0~15
 *          register*RW*rf_bias2_dina_reg
 *      [11:8]  4'h8    bias2_din2:DAC3 data, I channel, tia bias 
 *      [3:0]   4'h8    bias2_din0:DAC1 data, Q channel, tia bias 
 * @param   tiaBiasI: TIA0I tia bias.
 * @param   tiaBiasQ: TIA0Q tia bias.
 * @return  None.
 * @note
 */
void rfTiaDacBias(int32 tiaBiasI, int32 tiaBiasQ);

/*                        VGA                             */
/**
 * @brief   rf vga enable.
 * register*RW*rfc_vga0_reg rfc_vga1_reg
 *  [26]    1'h0    pga0_en:1: enable PGA0 
 *  [26]    1'h0    pga1_en:1: enable PGA1 
 * @param   pga0Enable: enable VGA0.
 * @param   pga1Enable: enable VGA1.
 * @return  None.
 * @note
 */
void rfVgaEnable(int32 vga0Enable, int32 vga1Enable);

/**
 * @brief   rf vga gain setting.selection:
 *          PGA_GAIN_0DB  PGA_GAIN_2DB  PGA_GAIN_4DB     PGA_GAIN_6DB 
 *          PGA_GAIN_8DB  PGA_GAIN_10DB PGA_GAIN_12DB    PGA_GAIN_14DB
 *          PGA_GAIN_16DB PGA_GAIN_18DB PGA_GAIN_19DB    PGA_GAIN_20DB
 *          PGA_GAIN_22DB PGA_GAIN_24DB PGA_GAIN_26DB    PGA_GAIN_28DB
 *          PGA_GAIN_30DB PGA_GAIN_32DB PGA_GAIN_34DB    PGA_GAIN_36DB PGA_GAIN_38DB
 *          PGA_GAIN_40DB
 *          register*RW*rfc_tia0_cfg_reg
 *          [25:21] 5'h0    pga0_q_gain:PGA diff gain, 0~40dB, 2dB/bit (AGC_VGA0[13:9]) 
 *          [20:16] 5'h0    pga0_i_gain:PGA diff gain, 0~40dB, 2dB/bit (AGC_VGA0[8:4])
 * @param   pga0IGain: TIA0I diff gain setting.
 * @param   pga0QGain: TIA0Q diff gain setting.
 * @param   pga1IGain: TIA1I diff gain setting.
 * @param   pga1QGain: TIA1Q diff gain setting.
 * @return  None.
 * @note
 */
void rfVgaGainSetting(int32 vga0IGain, int32 vga0QGain, int32 vga1IGain, int32 vga1QGain);

/**
 * @brief   rfPgaGainCal. selection:
 *          PGA_CAL_N1 0  //-1DB
 *          PGA_CAL_N5 1  //-0.5DB
 *          PGA_CAL_P1 2  //0.5DB
 *          PGA_CAL_P5 3  //1DB
 *          register*RW*rfc_tia0_cfg_reg 
 *          [7:0]   8'h0    tia0_reg:
 *          <0>: gain_cal_Q<1>: I/Q calibration gain range: -1~1dB, 0.5dB/bit. 
 *          rfc_vga0_reg [15:8]<0>: gain_cal_Q<0>: work with TIA_REG<0>.
 *          <1>: gain_cal_I<0>: . 
 *          <2>: gain_cal_I<1>: I/Q calibration gain range: -1~1dB, 0.5dB/bit. 
 * @param   pga0ICal: PGA0I calibration gain.
 * @param   pga0QCal: PGA0Q calibration gain.
 * @param   pga1ICal: PGA1I calibration gain.
 * @param   pga1QCal: PGA1Q calibration gain.
 * @return  None.
 * @note
 */
void rfPgaGainCalEnable(int32 pga0ICalEnable, int32 pga0QCalEnable, int32 pga1ICalEnable, int32 pga1QCalEnable);
void rfPgaGainCalSetting(int32 pga0ICal, int32 pga0QCal, int32 pga1ICal, int32 pga1QCal);

/**
 * @brief   rf vga setting. selection:0~15
 *          register*RW*rf_bias2_dina_reg
 *          [15:12] 4'h8    bias2_din3:DAC4 data, I channel, pga bias
 *          [7:4]   4'h8    bias2_din1:DAC2 data, Q channel, pga bias
 * @param   pgaBiasI:.
 * @param   pgaBiasQ:.
 * @return  None.
 * @note
 */
void rfVgaDacBias(int32 pgaBiasI, int32 pgaBiasQ);

/**
 * @brief   tia hpf parameter. selection:
 *          RC_HPF_150KHZ
 *          RC_HPF_400KHZ
 *          register*RW*rfc_tia0_cfg_reg rfc_tia1_cfg_reg
 *          <3>: hpf_fsel: 0: 150k, 1: 400kHz.(RC)
 *          <4>: hpf_bypass_mode: 0: HPF(RC), 1: bypass mode(from TIA to VGA).
 *          <5>: tia_dcos_fsel<0>: 00: 25k, 01: 50k, 10: 100k, 11: 300kHz.
 *          <6>: tia_dcos_fsel<1>: .
 *          <7>: tia_dcos_en: tia dc offset calibration enable, '0' disable.
 * @param   tia0HpfEnable:.
 * @param   tia1HpfEnable:.
 * @param   tia0HpfParameter:.
 * @param   tia1HpfParameter:.
 * @return  None.
 * @note
 */
void tiaHpfConfig(int32 tia0HpfEnable, int32 tia1HpfEnable, int32 tia0HpfParameter, int32 tia1HpfParameter);

/**
 * @brief   rc hpf parameter.
 * @param   rcHpf0Enable: .
 * @param   rcHpf1Enable: .
 * @param   rc0HpfParameter: .
 * @param   rc1HpfParameter: .
 * @return  None.
 * @note
 */
void rcHpfConfig(int32 rcHpf0Enable, int32 rcHpf1Enable, int32 rc0HpfParameter, int32 rc1HpfParameter);

/**
 * @brief   pga lpf parameter. selection:
 *          PGA_LPF_2M    PGA_LPF_4M
 *          PGA_LPF_6M    PGA_LPF_8M
 *          register*RW*rfc_tia0_cfg_reg rfc_tia0_cfg_reg 
 *          <3>: lpf_fsel<0>: 00: 2M, 01: 4M, 10: 6M,, 11: 8MHz. 
 *          <4>: lpf_fsel<1>: . 
 *          <7>: pga_dcos_en: pga dc offset calibration enable, '0' disable.
 * @param   pga0LpfParameter: pga0 lpf.
 * @param   pga1LpfParameter: pga1 lpf.
 * @return  None.
 * @note
 */
void pgaLpfConfig(int32 pga0LpfParameter, int32 pga1LpfParameter);

/**
 * @brief   pga lpf cal.
 * @param   lpf0CalEn: .
 * @param   lpf1CalEn: .
 * @param   lpf0CalConf: .
 * @param   lpf1CalConf: .
 * @return  None.
 * @note
 */
void pgaLpfCal(int32 lpf0CalEn, int32 lpf1CalEn, int32 lpf0CalConf, int32 lpf1CalConf);

/**
 * @brief   pga hpf parameter.
 * @param   vga0HpfEnable: vga0 hpf.
 * @param   vga1HpfEnable: vga1 hpf..
 * @param   pga0HpfParameter: pga0 hpf.
 * @param   pga1HpfParameter: pga1 hpf.
 * @return  None.
 * @note
 */
void pgaHpfConfig(int32 vga0HpfEnable, int32 vga1HpfEnable,int32 pga0HpfParameter, int32 pga1HpfParameter);

#endif
